1. Field of the Invention
The present invention relates to a display method for a plasma display device for displaying gradation by a sub-field technique. More particularly, it relates to a display method for a plasma display device reducing a dynamic-image pseudo contour in a large-area flicker that occurs when a television signal of a relatively low vertical synchronizing frequency or the like is displayed.
2. Description of the Related Art
It is a common practice to use the sub-field technique to display gradation in a display device, which can provide only binary display in principle, such as a plasma display device that employs a memory effect for display. The sub-field technique can be applied to a display device that can provide quick response such as a plasma display device. This technique quantizes a video signal and displays the resulting one-field data by time-sharing for each gradation bit.
Specifically, one field is divided into a kind of group of fragmented fields or a plurality of so-called sub-fields, each of which is weighted by the number of times of light emissions corresponding to each gradation bit. Then, the sub-field technique or a time-sharing technique is used to reproduce images in sequence to accumulate the images over one field by the integral effect of vision, so that natural gradation images are expressed.
For example, to realize a 256-level gradation display, the sub-field technique quantizes (converts analog to digital) in general an input analog video signal to brightness signals of 8 bits corresponding to gradation brightness data, each brightness of which differs by two times.
Then, the quantized video signal data is accumulated in a frame buffer memory.
Let the most significant bit MSB having the highest brightness be designated by B1, a bit having the second highest brightness by B2, and other bits by B3, B4, B5, B6, B7, and B8, respectively. The brightness ratio among the bits corresponds to 128:64:32:16:8:4:2:1. These bits are selected by each pixel, so that 256 levels of gradation can be realized in total, which correspond to brightness levels from 0 to 255.
FIG. 1 is a schematic diagram showing a prior-art display method for an AC color plasma display device. The method shown in FIG. 1 employs a sub-field technique in accordance with scan/sustain separate driving. As shown in FIG. 1, one field is divided into 8 sub-fields, or sub-fields SF1 to SF8, each of which has a scan period and a sustaining discharge period. During the scan period of the sub-field SF1, display data of the most significant bit B1 is written to each pixel. Then, after the data has been written, a sustaining discharge pulse is applied to the entire panel to allow only those pixels to which the data has been written to emit light for display. Subsequently, the sub-fields SF2 and other sub-fields are also driven in the same way. To provide sufficient brightness, for example, the pulse is applied to the sub-field SF1 256 times, to the sub-field SF2 128 times, and to sub-fields SF3 to SF8 64 times, 32 times, 16 times, 8 times, 4 times, and 2 times during the sustaining discharge period of each of the sub-fields. The numerals in FIG. 1 designate a weight assigned to each of the sub-field.
The aforementioned arrangement, in which one field is constituted so that the relative ratio of brightness decreases with time, is called a descending-order sub-field arrangement. In contrast, an arrangement in which one field is constituted so that the relative ratio of brightness increases with time is called an ascending-or der sub-field arrangement. These arrangements practiced in the sub-field technique are not special ones but have been conventionally used in general.
Other than these two arrangements, there are also other various techniques available only if the techniques are intended to display gradation. However, in cases where arrangements were simply replaced with one another in these sub-field arrangements, any one of the arrangements would cause the following disadvantages.
In general, the update speed of a screen is so set as to be the same as that of the vertical synchronizing signal in both a CRT display and a plasma display device. Accordingly, the optical stimulus to which human eyes are actually subjected on the screen is recognized as blinking in brightness proportional to the vertical synchronizing signal. As the repeated cycle of the blinking in brightness becomes longer, the blinking is recognized as more distinct flashing. On the other hand, as the repeated cycle becomes shorter, the blinking is recognized as continuous lighting. The boundary cycle between the continuous lighting and the flashing is called the xe2x80x9cCFF (Critical Fusion Frequency or Critical Flicker Frequency)xe2x80x9d. The CFF is described in a paper, xe2x80x9cGradation Display Scheme for Television using a memory gas-discharge panelxe2x80x9d, by Kohgami and Mikoshiba, which is described on pages 11 to 13 of Shingaku Engineering report EID 90-9.
The vertical synchronizing frequency employed by the European TV standards is 50 Hz in general. Thus, the repeating cycle of the vertical synchronizing signal and that of the video signal are generally the same as the CFF or 20 msec. Recognition of blinking in brightness as flashing or continuous lighting depends on the brightness level of a video signal to be displayed. One would recognize a similar video signal displayed more frequently as flashing if the signal had a higher brightness level. A state that is recognized as flashing is generally called a flicker. A flicker, recognized on the whole screen and caused by a low vertical synchronizing frequency, is called a large-area flicker. The large-area flicker frequently causes a problem of interfering with viewing of the screen on which signals are displayed particularly with high brightness levels.
As countermeasures against such a large-area flicker, a technique called the xe2x80x9c100 Hz TVxe2x80x9d for increasing the vertical frequency two times at the reception side of images has been used lately in the television with a CRT. This technique can be realized by accumulating image data for one picture in a memory and reading out the data twice at double speed. This technique can reduce the large-area flicker to such an extent that the flicker is hardly detected.
It is known in the plasma display device that some of the higher order sub-fields can be divided into halves and the arrangement of the two divided sub-field groups can be set as appropriate, thereby reducing the large-area flicker. For example, the aforementioned technique was suggested as processing for increasing the field frequency two times or more to reduce jerkiness in Japanese Patent Laid-Open Publication No. Hei 5-127612. Techniques similar to this were suggested in Japanese Patent Laid-Open Publications No. Hei 5-127613, No. Hei 5-127614, and No. Hei 5-127636. Among the publications, the techniques described in Japanese Patent Laid-Open Publications No. Hei 5-127614 and No. Hei 5-127636 aim to reduce flicker.
The higher the brightness is, the more noticeable the large-area flicker becomes. Thus, it is not always necessary to divide all gradation bits into halves in a plasma display device. That is, it is not sufficiently effective to divide lower order bits into halves that contribute to gradation display with low brightness when the large-area flicker is to be reduced. Thus, it is conceivable to divide relatively higher order bits into halves to reduce the large-area flicker. It is described in the aforementioned publications to divide higher order bits into halves in order to reduce the jerkiness of dynamic images. As such, these publications do not aim to reduce flicker. Accordingly, no publications are available so far that disclose the number of bits, settings of time, and arrangements to be divided into. Therefore, it cannot be said that the techniques set forth in the publications sufficiently and effectively prevent the large-screen flicker even when the techniques are carried out as they are described.
Recently, a technical theme of reducing dynamic-image pseudo contours has become a focus of most attention in the plasma display device. Dividing higher order bits into two halves can considerably reduce the dynamic-image pseudo contours. However, this cannot be said to be enough. In addition, the relatively lower order gradation bits that are not divided still have a phenomenon of dynamic-image pseudo contours in a dark image. For this reason, the technique of. distributing and arranging lower order bits in terms of time to take measures against the large-area flicker as shown in the aforementioned publications exerts an adverse effect on the level of occurrence of dynamic-image pseudo contours caused by the lower order bits. This can be explained readily from the fact that gradation transition between lower-order sub-fields accompanies a significant displacement in the center of gravity of light emission.
Displaying on a plasma display device such a video signal with a relatively low vertical synchronizing frequency as is employed in the European TV standards would cause the large-area flicker like one on the CRT display device. In general, the sub-field technique is used to realize gradation display on a plasma display device. Higher order sub-fields can be further divided into two halves and appropriate time intervals can be provided, thereby enabling measures against the large-area flicker relatively easily. In addition, most plasma display devices are used as a computer display unit with the vertical synchronizing frequency being set to a frequency higher than that employed by the European TV standards. However, viewing for many hours video signals not only with a sufficiently high vertical synchronizing frequency but also with a relatively low vertical synchronizing frequency would undesirably tire human eyes. Using a plasma display device for which the sub-field technique is employed to take measures against flicker allows the vertical synchronizing signal frequency to be increased two times, thereby providing a great advantage for VDT operators.
Consider a prior-art technique, for example, the technique described in Japanese Patent Laid-Open Publication No. Hei 5-127614 for reducing the large-area flicker. The technique only divides the two highest order bits into two halves for setting. However, this cannot provide a sufficient effect of reducing flicker for various types of image patterns. This is because combination of sub-fields employed by image patterns will cause time setting of the sub-fields that are not divided to vary. In addition, reduction of dynamic-image pseudo contours is not included in the processing of lower order bits, so that flicker can be prevented but a pseudo contour in a dark portion may readily occur. Furthermore, the large-area flicker is not sufficiently and effectively reduced.
The object of the present invention is to provide a display method for a plasma display device, which can reduce large-area flicker down to a level such that the flicker can be hardly noticed in practice, and which can reduce dynamic-image pseudo contours. The large-area flicker presents a problem when a video signal with such a low vertical synchronizing frequency as recommended by the European TV standards. Still another object of the present invention is desirably to reduce further the dynamic-image pseudo contours while reducing the large-area flicker by preferably employing redundant codes for video signals.
According to one aspect of the present invention a display method for a plasma display device comprises the steps of: obtaining first and second gradation bit groups by dividing m (4xe2x89xa6m less than n) gradation bits from the most significant bit into two halves so as to make weights thereof half, where n is a total number of gradation bits; arranging a plurality of sub-fields in said first and second gradation bit groups so as to be equal to each other; and determining a time interval between said first and second gradation bit groups to be h/2xc2x1h/14 (msec), where h (msec) is time of one field of a video signal to be displayed, by arranging at least one sub-field of the (nxe2x88x92m) non-divided gradation bits among said n gradation bits in between said first and second gradation bit groups.
The step of arranging at least one field may comprise the steps of: arranging higher order sub-fields by placing higher priority thereto among said (nxe2x88x92m) sub-fields in between said first and second gradation bit groups; and arranging the remaining sub-fields among said (nxe2x88x92m) sub-fields in a time interval other than one in between said first and second gradation bit groups.
At this time, sub-fields arranged within said first and second gradation bit groups, sub-fields arranged in between said first and second gradation bit groups, and sub-fields arranged in a time interval other than one in between said first and second gradation bit groups may be arranged in ascending order in each group from a gradation bit with the least weight, or in descending order in each group from a gradation bit with the greatest weight.
In addition, particularly when a video signal with a vertical synchronizing frequency of 50Hz recommended by the European TV standards is displayed, for example, an approximately 10 msec intervals may be provided in between the first and second gradation bit groups. At this time, said (nxe2x88x92m) sub-fields may be desirably arranged in between the gradation bit groups as many as possible from higher order bits so as to fall within the interval of 10 msec.
Furthermore, with the aforementioned steps being employed, a redundant code with several ways of expressing a level of gradation as a gradation bit may be employed.
According to the present invention, four or more gradation bits are divided into halves from the most significant bit in sequence and arranged at intervals of approximately a half of one field. Thus, the large-area flicker can be reduced down to such a level that the flicker can be hardly noticed.
Furthermore, the non-divided sub-fields of relatively lower order gradation bits are arranged in between the first and second gradation bit groups. Consequently, dynamic-image pseudo contours caused by the lower order bits can be reduced in a dark portion on a display screen. The non-divided sub-fields also serve to adjust the interval of one-half of a field period by being inserted in between the gradation bit groups.
In addition, as many sub-fields as possible are extracted from the higher order ones from the non-divided sub-fields to be arranged in between the first and second gradation bit groups, thereby enabling improvement of dynamic-image pseudo contours in a dark portion. On the other hand, arranging so many sub-fields as to significantly exceed the condition of approximately one-half of a field period would deteriorate the level of a large-area flicker. Therefore, an allowance limit is imposed on the number of sub-fields to be set in between the first and second gradation bit groups without causing any practical problem. In the present invention, the setting of time for gradation bit groups is adapted to fall within the range of xc2x1{fraction (1/14)} of a field period centered on one-half of a field time.
Within this range, the large-area flicker can be reduced down to a practical level, as the findings to be described later in the embodiments will show. Thus, according to the present invention, it is not necessary to provide an idle time for adjusting the interval between the first and second gradation bit groups, so that as many lower order non-divided sub-fields as possible can be concentrated in one place. The fact that an idle time needs not to be provided means that higher degrees of freedom are provided for allotting time of the whole drive sequence in a limited one field. The time that can be allotted freely can effectively contribute to improvement in brightness of the plasma display device and in quality of dynamic image.
As described above, the present invention allows the large-area flicker to be tremendously reduced and the dynamic-image pseudo contours to be reduced at the same time. In addition, the time for assembling the sub-field sequences can also be reduced significantly.
That is, according to the present invention, the large-area flicker can be reduced to a level at which no problem is presented in practice even at the time of display with high brightness as is recommended by the European TV standards. At the same time, obtrusive interference with the display quality by dynamic-image pseudo contours can be greatly improved which is a drawback caused by the sub-field technique. On the other hand, no additional cost is required. Thus, the present invention will make it possible to realize a full-color multi-level dynamic-image display device with good display quality such as a large-screen television and a full-color computer display device.